Edge Chipping on Thin Sapphire Windows: Why Miniaturisation Kills Yield

The defect that dominates cost on 0.3–0.5 mm parts — where it comes from, how it is measured, and what to change in the drawing.


Short answer

Sapphire is hard but not infinitely tough: at a 0.4 mm edge, a 0.1 mm chamfer leaves very little material to absorb a point load, so chips originate in CNC shaping, handling between processes, and edge polishing — not in the coating or the final inspection. In thin-window programmes, edge quality is the single largest yield variable, and it is decided by the drawing and the process route long before anyone measures transmission. Specify the chamfer, the edge polish, the inspection criterion, and the packaging — all four.


Why the edge is the weak point

Three factors converge:

  1. Geometry. A chamfer consumes a large fraction of the thickness. At 0.4 mm, a 0.1 mm × 45° chamfer removes 25% of the edge section.
  1. Stress concentration. Grinding leaves subsurface micro-cracks; under load they propagate along the edge rather than through the face.
  1. Handling. Thin parts flex. Every transfer between processes is an opportunity for edge contact.

The consequence is that a window can pass optical inspection and fail mechanically at assembly — or worse, pass assembly and chip in the field, opening a light path between LED and photodiode.


Where chips actually come from

Stage

Mechanism

Contribution

Core drilling / slicing

Micro-cracks at the cut edge

Medium

CNC contouring

Tool exit burrs, vibration on thin sections

High

Lapping

Edge contact with carrier plates

Medium

Polishing

Edge roll-off, chipping at high pressure

High

Cleaning

Part-to-part contact in baskets

Medium

Coating

Fixture contact

Low

Packing / shipping

Vibration, tray pockets too large

High

Assembly

Pick-and-place, adhesive squeeze-out

Medium

Two observations worth acting on:

  • The two highest contributors are process decisions, not material decisions. Tool path strategy and polishing pressure matter more than which sapphire boule you buy.
  • Packing is chronically under-specified. A tray pocket 0.2 mm oversized lets a thin part migrate and chip in transit — and the defect is discovered at your incoming inspection, attributed to the supplier's process.

What a chip costs downstream

A chip is not only a cosmetic reject. On a PPG window it is an optical defect, because the chip face scatters and can bridge the light path:

  • Scatter at the chip edge adds non-pulsatile background to the detector
  • Light bridging between LED and detector through the damaged edge produces a plausible but non-physiological waveform
  • Seal failure when the chip sits on the bond line

This is why "cosmetic" edge defects are functionally relevant on sensor windows, and why a cosmetic-only acceptance criterion is inadequate.


Specification language that prevents disputes

Most edge disputes come from a drawing that says "chamfer 0.1 mm" and nothing else. A workable specification has five parts:

Item

Example

Chamfer geometry

0.10 mm × 45°, both faces, or as-drawn

Edge surface

Polished, no visible chips under 10×

Acceptance criterion

No chip >0.05 mm; max 2 chips ≤0.05 mm outside clear aperture

Inspection method

Dark-field microscope at defined magnification, defined zones

Packaging

Pocket size, separator, max stack height

The clear-aperture concept is the cost lever: allowing cosmetic tolerance outside the optical zone can reduce polishing time substantially, while protecting the area that actually carries light.


Process levers that actually improve yield

Lever

Effect

Cost impact

Contour simplification

Fewer tool exits, fewer stress risers

Design change, often free

Sacrificial edge allowance

Leaves material for final edge polish

Small material cost

Lapping carrier redesign

Prevents edge contact

Tooling cost

Reduced polishing pressure with longer cycle

Less edge roll-off and chipping

Cycle time

In-process edge inspection

Catches trends before a lot is lost

Labour

Tray redesign

Eliminates transit damage

Low

Chamfer before final polish

Removes cracks, then polishes

Process sequence change

The last one is the most under-used: chamfering early and polishing after removes the subsurface damage that would otherwise propagate. It is a sequencing decision, and it is nearly free.


Thin-part handling: the invisible cost

At 0.3–0.5 mm, parts cannot be handled individually at production volume without damage. Practical approaches:

  • Wafer-level processing — keep parts on a carrier through polishing and coating, singulate late
  • Temporary bonding — mount on a sacrificial substrate for thinning and polishing
  • Tray-based flow — never touch the part, transfer trays
  • Edge-referenced fixturing — locate on the edge, not the face

Each adds process complexity and removes handling risk. Ask a supplier which route they use, because it determines whether their quoted yield is achievable at your volume.


Inspection: what to require

Check

Method

Purpose

Edge chip count and size

Dark-field microscopy, defined zones

Functional and cosmetic

Edge roughness

Profilometry or visual comparator

Scatter and seal

Chamfer geometry

Cross-section or optical measurement

Assembly fit

Subsurface damage

Polishing etch check (destructive, sampled)

Predicts latent failure

Dimensional

CMM / optical

Stack-up

A supplier who reports only "visual OK" is not measuring the thing that fails.


FAQ

At what thickness does chipping become the dominant yield loss? Practically below about 0.5 mm, and sharply below 0.35 mm. At 0.4 mm, edge quality is usually the largest single yield variable; at 0.8 mm it is one of several.

Can chips be reworked? Small edge chips outside the clear aperture can sometimes be re-polished, at the cost of dimensional change. Inside the aperture or on a seal land, the part is scrap.

Does coating hide edge chips? No. Coating is conformal and thin; it follows the chip and does not fill it.

Is laser cutting better than CNC for thin windows? Laser can produce complex contours with less mechanical stress, but introduces a heat-affected zone that needs etching or polishing. For most wearable volumes, CNC with a good edge route is more predictable.

Why do chips appear only after shipping? Because transit is a mechanical test nobody specified. Vibration in an oversized tray pocket is enough. Specify the packaging, then inspect on receipt before blaming the process.


Talk to the sapphire engineers

Sun Yin Crystal Industry Company Limited has machined thin sapphire since 1994 — 20 million pieces per year, with in-house crystal growth, CNC shaping, multi-stage polishing, and AR/AF coating. Windows from 2 mm to 300 mm, including 0.3–0.5 mm parts for ring and watch sensor applications.

https://www.sunyinsapphire.com/
SUN YIN CRYSTAL INDUSTRY COMPANY LTD

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